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EL7583
Data Sheet May 12, 2006 FN7335.5
3-Channel DC/DC Converter
The EL7583 is a 3-channel DC/DC converter IC which is designed primarily for use in TFT-LCD applications. It features a PWM boost converter with 2.7V to 14V input capability and 5V to 17V output, which powers the column drivers and provides up to 470mA @ 12V, 370mA @ 15V from 5V supply. A pair of charge pump control circuits provide regulated outputs of VON and VOFF supplies at 8V to 40V and -5V to -40V, respectively, each at up to 60mA. The EL7583 features adjustable switching frequency, adjustable soft start, and a separate output VON enable control to allow selection of supply start-up sequence. An over-temperature feature is provided to allow the IC to be automatically protected from excessive power dissipation. The EL7583 is available in a standard 20 Ld TSSOP package and the Pb-free 20 Ld HTSSOP package. Both are specified for operation over the full -40C to +85C temperature range.
Features
* TFT-LCD display supply - Boost regulator - VON charge pump - VOFF charge pump * 2.7V to 14V VIN supply * 5V < VBOOST < 17V * 5V < VON < 40V * -40V < VOFF < 0V * VBOOST = 12V @ 470mA * VBOOST = 15V @ 370mA * High frequency, small inductor DC/DC boost circuit * Over 90% efficient DC/DC boost converter capability * Adjustable frequency * Adjustable soft-start * Adjustable outputs
Ordering Information
PART NUMBER EL7583IR EL7583IR-T7 EL7583IR-T13 EL7583IREZ (See Note) EL7583IREZ-T7 (See Note) PART TAPE & MARKING REEL 7583IR 7583IR 7583IR 7583IREZ 7583IREZ 7" 13" 7" 13" PACKAGE 20 Ld TSSOP 20 Ld TSSOP 20 Ld TSSOP PKG. DWG. # MDP0044 MDP0044 MDP0044
* Small parts count * Pb-free plus anneal available (RoHS compliant)
Applications
* TFT-LCD panels * PDAs
20 Ld HTSSOP MDP0048 (Pb-free) 20 Ld HTSSOP MDP0048 (Pb-free) 20 Ld HTSSOP MDP0048 (Pb-free)
Pinout
EL7583 (20 LD TSSOP/HTSSOP) TOP VIEW
VSSB 1 SS 2 FBB 3 VDDB 4 LX 5 LX 6 LX 7 DRVN 8 VDDN 9 FBN 10 20 ROSC 19 ENP 18 ENBN 17 VREF 16 PGND 15 PGND 14 DRVP 13 VDDP 12 FBP 11 VSSP
EL7583IREZ-T13 7583IREZ (See Note)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
REFER TO PCB LAYOUT GUIDELINE
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2003, 2005-2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
EL7583
Absolute Maximum Ratings (TA = 25C)
VIN Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14V VDDB, VDDP, VDDN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18V LX Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18V Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . . 0.5A Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C Die Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Operating Ambient Temperature . . . . . . . . . . . . . . . .-40C to +85C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER
VIN = 3.3V, VBOOST = 12V, ROSC = 100k, TA = 25C Unless Otherwise Specified CONDITIONS MIN TYP MAX UNIT
DESCRIPTION
DC/DC BOOST CONVERTER IQ1_B IQ2_B V(FBB) VREF VROSC I(FBB) VDDB DMAX I(LX)MAX RDS-ON ILEAK-SWITCH VBOOST VBOOST/VIN VBOOST/IO1 FOSC-RANGE FOSC1 Quiescent Current - Shut-down Quiescent Current - Switching Feedback Voltage Reference Voltage Oscillator Set Voltage Feedback Input Bias Current Boost Converter Supply Range Maximum Duty Cycle Peak Internal FET Current Switch On Resistance Switch Leakage Current Output Range Line Regulation Load Regulation Frequency Range Switching Frequency at VBOOST = 10V, I(LX) total = 350mA I(LX) total VBOOST > VIN + VDIODE 2.7V < VIN < 13.2V, VBOOST = 15V 50mA < IO1 < 250mA ROSC range = 240k to 60k ROSC = 100k 200 620 680 5 0.1 0.5 1000 750 2.7 85 92 1.75 0.22 1 17 ENBN = ENP = 0V ENBN = VDDB 1.275 1.260 1.260 0.8 4.8 1.300 1.310 1.325 0.1 17 10 8 1.325 1.360 1.390 A mA V V V A V % A A V % % kHz kHz
POSITIVE REGULATED CHARGE PUMP (VON) Most positive VON output depends on the magnitude of the VDDP input voltage (normally connected to VBOOST) and the external component configuration (doubler or tripler) VDDP IQ1(VDDP) IQ2(VDDP) V(FBP) I(FBP) I(DRVP) Supply Input for Positive Charge Pump Quiescent Current - Shut-down Quiescent Current - Switching Feedback Reference Voltage Feedback Input Bias Current RMS DRVP Output Current VDDP = 12V VDDP = 6V ILR_VON FPUMP Load Regulation Charge Pump Frequency 5mA < IL < 15mA Frequency set by ROSC - see boost section 15 -0.5 0.03 0.5*FOSC 0.5 Usually connected to VBOOST output ENP = 0V ENBN = ENP = VDDB 1.245 5 11.5 2.3 1.310 0.1 60 17 20 5 1.375 V A mA V A mA mA %/mA
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EL7583
Electrical Specifications
PARAMETER VIN = 3.3V, VBOOST = 12V, ROSC = 100k, TA = 25C Unless Otherwise Specified (Continued) CONDITIONS MIN TYP MAX UNIT
DESCRIPTION
NEGATIVE REGULATED CHARGE PUMP (VOFF) Most negative VOFF output depends on the magnitude of the VDDN input voltage (normally connected to VBOOST) and the external component configuration (doubler or tripler) VDDN IQ1(VDDN) IQ2(VDDN) V(FBN) I(FBN) I(DRVN) Supply Input for Negative Charge Pump Quiescent Current - Shut-down Quiescent Current - Switching Feedback Reference Voltage Feedback Input Bias Current RMS DRVN Output Current Magnitude of input bias VDDN = 12V VDDN = 6V ILR_VOFF FPUMP Load Regulation Charge Pump Frequency -15mA < IL < -5mA Frequency set by ROSC - see boost section 15 -0.5 0.03 0.5*FOSC 0.5 Usually connected to VBOOST output ENBN = 0V ENBN = VDDB -80 5 1.2 2.3 0 0.1 60 17 10 5 +80 V A mA mV A mA mA %/mA
ENABLE CONTROL LOGIC VHI-ENX VLO-ENX IL(EN"X") IL(ENBN) IL(ENP) Enable Input High Threshold Enable Input Low Threshold Logic Low Bias Current Logic High Bias Current Logic High Bias Current x = "BN", "P" x = "BN", "P" X = "BN", "P" = 0V ENBN = 5V ENP = 5V 0.1 7.5 3.3 15 7.5 1.6 0.8 V V A A A
OVER-TEMPERATURE PROTECTION TOT THYS Over-temperature Threshold Over-temperature Hysteresis 130 40 C C
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EL7583 Pin Descriptions
PIN NUMBER 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 I = Input, O = Output, S = Supply PIN TYPE S I I S O O O O S I S I S O O O I I I I PIN FUNCTION Ground for DC/DC boost and reference circuits; chip substrate Soft-start input; the capacitor connected to this pin sets the current limited start time Voltage feedback input for boost circuit; determines boost output voltage, VBOOST Positive supply input for DC/DC boost circuits Boost regulator inductor drive connected to drain of internal NFET Boost regulator inductor drive connected to drain of internal NFET Boost regulator inductor drive connected to drain of internal NFET Driver output for the external generation of negative charge pump voltage, VOFF Positive supply for input for VOFF generator Voltage feedback input to determine negative charge pump output, VOFF Negative supply pin for both the positive and negative charge pumps Voltage feedback to determine positive charge pump output, VON Positive supply input for VON generator Voltage driver output for the external generation of positive charge pump, VON Power ground, connected to source of internal NFET Power ground, connected to source of internal NFET Voltage reference for charge pump circuits; decouple to ground Enable pin for boost (VBOOST generation) and negative charge pump (VOFF generation); active high Enable for DRVP (VON generation); active high Connected to an external resistor to ground; sets the switching frequency of the DC/DC boost
PIN NAME VSSB SS FBB VDDB LX LX LX DRVN VDDN FBN VSSP FBP VDDP DRVP PGND PGND VREF ENBN ENP ROSC
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EL7583 Typical Performance Curves
95 90 85 EFFICIENCY (%) 80 75 70 65 60 55 50 0 100 200 300 400 500 600 700 800 IOUT (mA) VIN=3.3V FREQ=1MHz 65 60 0 100 200 300 400 500 600 700 800 IOUT (mA) VIN=5V FREQ=1MHz 15V 12V 5V 9V EFFICIENCY (%) 95 90 12V 85 80 75 70 15V 9V
FIGURE 1. EFFICIENCY vs IOUT
FIGURE 2. EFFICIENCY vs IOUT
95 90 5V EFFICIENCY (%) 12V EFFICIENCY (%) 85 80 75 70 65 60 0 100 200 300 400 500 600 700 800 IOUT (mA) VIN=3.3V FREQ=700kHz 15V 9V
95 90 85 80 75 70 65 60 0 100 200 300 400 500 600 700 800 IOUT (mA) VIN=5V FREQ=700kHz 15V 12V 9V
FIGURE 3. EFFICIENCY vs IOUT
FIGURE 4. EFFICIENCY vs IOUT
970 969 FREQUENCY (kHz) 968 967 966 965 964 963 962 3 3.5 4 4.5 VDDB (V) 5 5.5 6 VOLTAGE (V) ROSC = 61.9k
1.27
1.265
1.26
1.255
1.25 -50
0
50 TEMPERATURE (C)
100
150
FIGURE 5. FS vs VDDB
FIGURE 6. VREF vs TEMPERATURE
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EL7583 Typical Performance Curves (Continued)
f=675kHz, VIN=5.0V 1.5 1.0 LOAD REGULATION (%) 0.5 0.0 -0.5 -1.0 18V -1.5 0 100 200 300 15V 400 12V 500 9V -1.5 600 700 0 100 200 300 400 500 600 700 800 IOUT (mA) 1.5 1.0 LOAD REGULATION (%) 0.5 0.0 -0.5 15V -1.0 18V 12V 9V 5V f=675kHz, VIN=3.3V
IOUT (mA)
FIGURE 7. LOAD REGULATION vs IOUT
FIGURE 8. LOAD REGULATION vs IOUT
1.5 1.0 LOAD REGULATION (%) 0.5 0.0 -0.5 -1.0 -1.5
f=1MHz, VIN=5.0V
f=1MHz, VIN=3.3V 1.5 1.0 LOAD REGULATION (%) 0.5 0.0 -0.5 -1.0 -1.5 15V 12V 18V 500 600 700 0 100 200 300 9V 400 500 600 5V 700 800
18V 15V 0 100 200 300 400
12V
9V
IOUT (mA)
IOUT (mA)
FIGURE 9. LOAD REGULATION vs IOUT
FIGURE 10. LOAD REGULATION vs IOUT
20 19 18 VON (V) VOFF (-V) VDDP = 12V 17 16 15 14 0 10 20 30 40 50 60 70 80 ILOAD (mA) VDDP = 15V
6.5 6 5.5 5 4.5 4 3.5 0 10 20 30 40 50 60 70 80 ILOAD (mA) VDDN = 12V VDDN = 15V
FIGURE 11. VON vs ION
FIGURE 12. VOFF vs IOFF
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EL7583 Typical Performance Curves (Continued)
f(MHz)=1/(0.0118 ROSC+0.378) 1400 1200 FREQUENCY (kHz) 1000 800 600 400 200 0 0 50 100 150 200 250 300 350 400 450 ROSC (k) SWITCHING PERIOD (s) SWITCHING PERIOD(s)=0.0118 ROSC+0.378) 6 5 4 3 2 1 0 0 50 100 150 200 250 300 350 400 450 ROSC (k)
FIGURE 13. FS vs ROSC
FIGURE 14. FS vs ROSC
100K & 0.1F DELAY NETWORK ON ENP, CSS=0.1F
100K & 0.1F DELAY NETWORK ON ENP, CSS=0.1F
VBOOST 5V/DIV 5V/DIV
VBOOST
10V/DIV VON
10V/DIV
VON
2V/DIV
VOFF
2V/DIV
VOFF
200ms/DIV
1ms/DIV
FIGURE 15. POWER-DOWN
FIGURE 16. POWER-UP
VIN=3.3V, VOUT=11.3V, IOUT=50mA
VIN=3.3V, VOUT=11.3V, IOUT=250mA
FIGURE 17. LX WAVEFORM - DISCONTINUOUS MODE
FIGURE 18. LX WAVEFORM - CONTINUOUS MODE
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EL7583 Typical Performance Curves (Continued)
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD HTSSOP EXPOSED DIEPAD SOLDERED TO PCB PER JESD51-5 2.857W
HTSSOP20 JA=35C/W
3.5 3 2.5 2 1.5
1 0.9 POWER DISSIPATION (W) 0.8
JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 800mW
HTSSOP20
JA = 125C/W
POWER DISSIPATION (W)
0.7 714mW 0.6 0.5 0.4 0.3 0.2 0.1
TSSOP20 JA=140C/W
1 1.111W 0.5 0 0
TSSOP20 JA=90C/W
25
50
75 85
100
125
150
0 0 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (C)
AMBIENT TEMPERATURE (C)
FIGURE 19. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
FIGURE 20. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
Functional Block Diagram
VOUT R2 R1 13k 110k 49 10F 0.1F FBB MAX_DUTY ROSC R3 62k REFERENCE GENERATOR VDDB LX 10F 10H VIN
VREF VRAMP PWM COMPARATOR PWM LOGIC 0.22
ENBN
12A
START-UP OSCILLATOR
+ ILOUT 7.2K 160m
VSSB
SS 0.1F
PGND
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EL7583 Applications Information
The EL7583 is high efficiency multiple output power solution designed specifically for thin-film transistor (TFT) liquid crystal display (LCD) applications. The device contains one high current boost converter and two low power charge pumps (VON and VOFF). The boost converter contains an integrated N-channel MOSFET to minimize the number of external components. The converter output voltage can be set from 5V to 18V with external resistors. The VON and VOFF charge pumps are independently regulated to positive and negative voltages using external resistors. Output voltages as high as 40V can be achieved with additional capacitors and diodes.
Steady-State Operation
When the output reaches the preset voltage, the regulator operates at steady state. Depending on the input/output condition and component, the inductor operates at either continuous-conduction mode or discontinuous-conduction mode. In the continuous-conduction mode, the inductor current is a triangular waveform and LX voltage a pulse waveform. In the discontinuous-conduction mode, the inductor current is completely `dried-out' before the MOSFET is turned on again. The input voltage source, the inductor, and the MOSFET and output diode parasitic capacitors forms a resonant circuit. Oscillation will occur in this period. This oscillation is normal and will not affect the regulation. At very low load, the MOSFET will skip pulse sometimes. This is normal.
Boost Converter
The boost converter operates in constant frequency pulsewidth-modulation (PWM) mode. Quiescent current for the EL7583 is only 5mA when enabled, and since only the low side MOSFET is used, switch drive current is minimized. 90% efficiency is achieved in most common application operating conditions. A functional block diagram with typical circuit configuration is shown on previous page. Regulation is performed by the PWM comparator which regulates the output voltage by comparing a divided output voltage with an internal reference voltage. The PWM comparator outputs its result to the PWM logic. The PWM logic switches the MOSFET on and off through the gate drive circuit. Its switching frequency is external adjustable with a resistor from timing control pin (ROSC) to ground. The boost converter has 200kHz to 1.2MHz operating frequency range.
Current Limit
The MOSFET current limit is nominal ILMT = 1.75. This restricts the maximum output current IOMAX based on the following formula:
V IN I OMAX = I LMT - L x ------------- V 2 O
where: * IL is the inductor peak-to-peak current ripple and is decided by:
V IN D I L = --------- x -----L FS
Start-Up
After VDDB reaches a threshold of about 2V, the power MOSFET is controlled by the start-up oscillator, which generates fixed duty-ratio of 0.5 - 0.7 at a frequency of several hundred kilohertz. This will boost the output voltage, providing the initial output current load is not too great (<250mA). When VDDB reaches about 3.7V, the PWM comparator takes over the control. The duty ratio will be decided by the multiple-input direct summing comparator, Max_Duty signal (about 90% duty-ratio), and the Current Limit Comparator, whichever is the smallest. The soft-start is provided by the current limit comparator. As the internal 12A current source charges the external softstart capacitor, the peak MOSFET current is limited by the voltage on the capacitor. This in turn controls the rising rate of output voltage. The regulator goes through the start-up sequence as well after the ENBN signal is pulled to HI.
* D is the MOSFET turn-on radio and is decided by:
V O - V IN D = ----------------------VO
* FS is the switching frequency.
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EL7583
The following table gives typical values: (Margins are considered 10%, 3%, 20%, 10%, and 15% on VIN, VO, L, FS, and ILMT, respectively)
TABLE 1. MAXIMUM CONTINUOUS OUTPUT CURRENT VIN (V) 3.3 3.3 3.3 5 5 5 12 VO (V) 9 12 15 9 12 15 18 L (H) 10 10 10 10 10 10 10 FS (kHz) 1000 1000 1000 1000 1000 1000 1000 IOMAX (mA) 430 320 250 650 470 370 830
A 1nF compensation capacitor across the feedback resistor to ground is recommended to keep the converter in stable operation at low output current and high frequency conditions.
Schottky Diode
Speed, forward voltage drop, and reverse current are the three most critical specifications for selecting the Schottky diode. The entire output current flows through the diode, so the diode average current is the same as the average load current and the peak current is the same as the inductor peak current. When selecting the diode, one must consider the forward voltage drop at the peak diode current. On the Elantec demo board, MBRM120 is selected. Its forward voltage drop is 450mV at 1A forward current.
Output Capacitor
Component Considerations
Input Capacitor
It is recommended that CIN is larger than 10F. Theoretically, the input capacitor has ripple current of IL. Due to high-frequency noise in the circuit, the input current ripple may exceed the theoretical value. Larger capacitor will reduce the ripple further.
The EL7583 is specially compensated to be stable with capacitors which have a worst-case minimum value of 10F at the particular VOUT being set. Output ripple voltage requirements also determine the minimum value and the type of capacitors. Output ripple voltage consists of two components - the voltage drop caused by the switching current though the ESR of the output capacitor and the charging and discharging of the output capacitor:
I OUT V OUT - V IN V RIPPLE = I LPK x ESR + ------------------------------- x -----------------------------C x FS V
OUT OUT
Boost Inductor
The inductor has peak and average current decided by:
I L I LPK = I LAVG + -------2 IO I LAVG = ------------1-D
For low ESR ceramic capacitors, the output ripple is dominated by the charging/discharging of the output capacitor. In addition to the voltage rating, the output capacitor should also be able to handle the RMS current is given by:
I CORMS =
2 I L 1 ( 1 - D ) x D + ------------------- x ----- x I LAVG 2 12 I LAVG
The inductor should be chosen to be able to handle this current. Furthermore, due to the fixed internal compensation, it is recommended that maximum inductance of 10H and 15H to be used in the 5V and 12V or higher output voltage, respectively. The output diode has average current of IO, and peak current the same as the inductor's peak current. Schottky diode is recommended and it should be able to handle those currents.
Positive and Negative Charge Pump (VON and VOFF)
The EL7583 contains two independent charge pumps (see charge pump block and connection diagram.) The negative charge pump inverts the VDDN supply voltage and provides a regulated negative output voltage. The positive charge pump doubles the VDDP supply voltage and provides a regulated positive output voltage. The regulation of both the negative and positive charge pumps is generated by the internal comparator that senses the output voltage and compares it with and internal reference. The switching frequency of the charge pump is set to 1/2 the boost converter switching frequency. The pumps use pulse width modulation to adjust the pump period, depending on the load present. The pumps are shortcircuit protected to 180mA at 12V supply and can provide 15mA to 60mA for 6V to 12V supply.
Feedback Resistor Network
An external resistor divider is required to divide the output voltage down to the nominal reference voltage. Current drawn by the resistor network should be limited to maintain the overall converter efficiency. The maximum value of the resistor network is limited by the feedback input bias current and the potential for noise being coupled into the feedback pin. A resistor network in the order of 200k is recommended. The boost converter output voltage is determined by the following relationship:
R1 + R2 V BOOST = -------------------- x V FBB R1
where VFBB is 1.300V.
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EL7583 Single Stage Charge Pump
VDDN VDDP 0.1F RONP DRVN CCPN VOFF COUT2 3.3F RONN VSSN RONN VSSP R12 V COUT1ON 2.2F OSC RONP DRVP 0.1F CCPP 5V TO 17V
5V TO 17V
R21
FBN
+ -
+ + RON IS 30 - 40 FOR VDD 6V TO 12V VFBP
FBP
R11
R22 VREF
Positive Charge Pump Design Considerations
A single stage charge pump is shown above. The maximum VON output voltage is determined by the following equation:
1 1 V ON ( max ) 2 x V DDCPP - I OUT x 2 x ( R ONN + R ONP ) - 2 x V DIODE - I OUT x ------------------------------------------- - I OUT x ----------------------------------------------0.5 x F x C 0.5 x F x C
S CPP S OUT1
where: * RONN and RONP resistance values depend on the VDDP voltage levels. For 12V supply, RON is typically 33. For 6V supply, RON is typically 45. If additional stage is required, the LX switching signal is recommended to drive the additional charge pump diodes. The drive impedance at the LX switching is typically 220m. The figure below illustrates an implementation for two-stage positive charge pump circuit.
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EL7583 Two-Stage Positive Charge Pump Circuit
VDDP VBOOST (5V-17V)
VLX CCPP VON
RONP DRNP CCPP RONN VSSP COUT1
COUT1 R12
+
FBP
1.265V
+ -
R11
The maximum VON output voltage for N+1 stage charge pump is:
1 V ON ( max ) 2 x V DDP - I OUT x 2 x ( R ONN + R ONP ) - 2 x V DIODE - I OUT x ------------------------------------------- - I OUT x 0.5 x F x C 1 1 1 ----------------------------------------------- + N x V LX ( max ) - N x 2 x V DIODE + I OUT x ------------------------------------------- + I OUT x ----------------------------------------------- 0.5 x F S x C OUT1 0.5 x F S x C CPP 0.5 x F S x C OUT1
S CPP
R11 and R12 set the VON output voltage:
R 11 + R 12 V ON = V FBP x -------------------------R
11
where VFBP is 1.310V.
Negative Charge Pump Design Considerations
The criteria for the negative charge pump is similar to the positive charge pump. For a single stage charge pump, the maximum VOFF output voltage is:
1 1 V OFF ( max ) I OUT x 2 x ( R ONN + R ONP ) + 2 x V DIODE - IOUT x ------------------------------------------- - I OUT x ----------------------------------------------- - V DDN 0.5 x F x C 0.5 x F x C
S CPN S OUT2
Similar to positive charge pump, if additional stage is required, the LX switching signal is recommended to drive the additional charge pump diodes. The figure on the next page shows a two stage negative charge pump circuit.
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EL7583 Two-Stage Negative Charge Pump Circuit
VDDN RONP DRVN RONN VSSN FBN CCPN COUT2 COUT2 R21
5V-17V
VLX CCPN VOFF
+ -
R22 VREF
The maximum VOFF output voltage for N+1 stage charge pump is:
1 1 V OFF ( max ) I OUT x 2 x ( R ONN + R ONP ) + 2 x V DIODE - I OUT x -------------------------------------------- - I OUT x ----------------------------------------------- 0.5 x F x C 0.5 x F x C 1 1 V DDN - N x V LX ( max ) + N x 2 x V DIODE + I OUT x -------------------------------------------- + I OUT x ----------------------------------------------- 0.5 x F x C 0.5 x F x C
S CPN S OUT2 S CPN S OUT2
R21 and R22 determine VOFF output voltage:
R 21 V OFF = -V REF x --------R 22
where VREF is 1.310V.
Over-Temperature Protection
An internal temperature sensor continuously monitors the die temperature. In the event that die temperature exceeds the thermal trip point, the device will shut down and disable itself. The upper and lower trip points are typically set to 130C and 90C respectively. shielding trace or layer. This is to prevent undesirable switching interactions coupling into the feedback inputs. * Place the charge pump feedback resistor network after the diode and output capacitor node to avoid switching noise. * All low-side feedback resistors should be connected directly to VSSB. VSSB should be connected to the power ground close at one point only. A demo board is available to illustrate the proper layout implementation.
PCB Layout Guidelines
Careful layout is critical in the successful operation of the application. The following layout guidelines are recommended to achieve optimum performance. * VREF and VDDB bypass capacitors should be placed next to the pins. * Place the boost converter diode and inductor close to the LX pins. * Place the boost converter output capacitor close to the PGND pins. * Locate feedback dividers close to their respected feedback pins to avoid switching noise coupling into the high impedance node. * Switching output PCB traces should not cross, or be laid out adjacent to, feedback traces without using a grounded
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EL7583 Typical Application Circuit
R2 110K C7 C10 0.1F OPEN R1 13K 3 FBB R4 49.9 VBOOST (12V@ 500mA) C5 10F + C4 C3 22F L1 VIN VOFF (-6V@ 15mA) GND C1 10F + C2 4.7F 10H 7 LX C22 8 DRVN 0.1F C21 R21 154K C27 0.1F C26 3.3F 0.1F 9 VDDN 10 FBN FBP 12 VSSP 11 VDDP 13 DRVP 14 D1* 6 LX PGND 15 C6 0.1F OPEN 4 VDDB 5 LX VREF 17 PGND 16 ENBN 18 1 VSSB 2 SS ROSC 20
R3 61.9K ENP 19 R5 R6 C8 0.1F C50 OPEN 497K 0
C9 1nF C12 0.1F D11** C11 0.1F C16 0.1F C17 2.2F R12 51K R11 3.9K VON (18V@18mA)
D21**
R22 33.2K
* MBRM120LT3 ** BAT54S
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EL7583 TSSOP Package Outline Drawing
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EL7583 HTSSOP Package Outline Drawing
NOTE: The package drawing shown here may not be the latest version. To check the latest revision, please refer to the Intersil website at http://www.intersil.com/design/packages/index.asp
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 16
FN7335.5 May 12, 2006

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